1. Field of the Invention
This invention relates to a semiconductor storage device.
2. Background Art
There is an FBC (Floating Body Cell) memory device as a semiconductor storage device expected to be a substitute of DRAMs. An FBC memory device has transistors formed on a SOI (Silicon On Insulator) substrate and having floating bodies (herein below, referred to as body regions as well), and stores data “1” or data “0” depending upon whether holes are stored in the body regions.
FBC memory cells comprising FETs (Field Effect Transistors) involve the problem of charge pumping phenomenon explained below (see “Principle of Transients Charge Pumping on Partially Depleted SOI MOSFETs” by S. Okhonin et al., IEEE Electron Device Letters, Vol. 23, No. 5, May 2002). In case the memory cells are N-type FETs, when a memory cell is ON, part of electrons in the inverted layer is trapped by the interfacial level along the interface between a gate oxide film and the body region. Holes stored heretofore in the body region recombine with these electrons and disappear. Therefore, while the memory cells are turned ON and OFF repetitively, holes stored in the body regions gradually decrease, and the state of data “1” undesirably changes to data “0”.
Therefore, a semiconductor storage device, which is capable of preventing the charge pumping phenomenon by counting the number of activating times of word lines, is desired.